Invention Grant
- Patent Title: Device with air-gaps to reduce coupling capacitance and process for forming such
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Application No.: US16457677Application Date: 2019-06-28
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Publication No.: US11574910B2Publication Date: 2023-02-07
- Inventor: Abhishek Sharma , Willy Rachmady , Van H. Le , Travis W. Lajoie , Urusa Alaan , Hui Jae Yoo , Sean Ma , Aaron Lilak
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L21/764 ; H01L27/12
Abstract:
A device is disclosed. The device includes a plurality of capacitors, a transistor connected to each of the plurality of capacitors, and a first dielectric layer and a second dielectric layer on respective adjacent sides of adjacent capacitors of the plurality of capacitors. The first dielectric layer and the second dielectric layer include a top portion and a bottom portion, the top portion of the first dielectric layer and the top portion of the second dielectric layer extend from respective directions and meet at a top portion of a space between the adjacent capacitors, the bottom portion of the first dielectric layer and the bottom portion of the second dielectric layer extend from respective directions and meet at a bottom portion of a space between the adjacent capacitors. The device also includes one or more air-gaps surrounded by the first dielectric layer and the second dielectric layer on respective adjacent sides of the adjacent capacitors, the top portion of the first dielectric layer and the second dielectric layer between the adjacent capacitors, and the bottom portion of the first dielectric layer and the second dielectric layer between the adjacent capacitors.
Information query
IPC分类:
