Invention Grant
- Patent Title: Vertical field effect transistor with self-aligned source and drain top junction
-
Application No.: US17453122Application Date: 2021-11-01
-
Publication No.: US11575025B2Publication Date: 2023-02-07
- Inventor: Ruilong Xie , Chun-Chen Yeh , Alexander Reznicek , Chen Zhang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Michael A. Petrocelli
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/8238 ; H01L29/417 ; H01L29/16 ; H01L29/08 ; H01L29/78

Abstract:
A vertical field effect transistor includes a first epitaxial region in contact with a top surface of a channel fin extending vertically from a bottom source/drain located above a substrate, a second epitaxial region above the first epitaxial region having a horizontal thickness that is larger than a horizontal thickness of the first epitaxial region. The first epitaxial region and the second epitaxial region form a top source/drain region of the semiconductor structure. The first epitaxial region has a first doping concentration and the second epitaxial region has a second doping concentration that is lower than the first doping concentration. A top spacer, adjacent to the first epitaxial region and the second epitaxial region, is in contact with a top surface of a high-k metal gate stack located around the channel fin and in contact with a top surface of a first dielectric layer disposed between adjacent channel fins.
Public/Granted literature
- US20220059677A1 VERTICAL FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED SOURCE AND DRAIN TOP JUNCTION Public/Granted day:2022-02-24
Information query
IPC分类: