Invention Grant
- Patent Title: Semiconductor device and manufacturing method thereof
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Application No.: US17705407Application Date: 2022-03-28
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Publication No.: US11575045B2Publication Date: 2023-02-07
- Inventor: Yi-Chung Liang
- Applicant: Powerchip Semiconductor Manufacturing Corporation
- Applicant Address: TW Hsinchu
- Assignee: Powerchip Semiconductor Manufacturing Corporation
- Current Assignee: Powerchip Semiconductor Manufacturing Corporation
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Priority: TW109143094 20201207
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/78 ; H01L29/08 ; H01L29/66 ; H01L29/165

Abstract:
A manufacturing method of a semiconductor device at least includes the following steps. A substrate having a stacked structure is provided. An epitaxy process is performed to form an epitaxial layer on the substrate on two sides of the stacked structure. A recess is forming on the two sides of the stacked structure, wherein the recess penetrates through the epitaxial layer, extends into the substrate, and has a tip located in the substrate. A source/drain region is formed in the recess, wherein a material of the source/drain region comprises silicon germanium. A spacer wall material layer is formed on the substrate. A portion of the stacked structure is removed to from a gate structure. A portion of the spacer wall material layer is removed to form a spacer wall on the epitaxial layer. A semiconductor device is also provided.
Public/Granted literature
- US20220216337A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2022-07-07
Information query
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