Circuit of controlling common voltage of liquid crystal panel
Abstract:
The present disclosure relates to a circuit of controlling a common voltage of a liquid crystal panel. According to an embodiment of the present disclosure, a voltage control circuit is configured to provide a common voltage to a common electrode of a liquid crystal panel. The liquid crystal panel includes M rows and N columns of pixel units. Each pixel unit is coupled to the common electrode. The voltage control circuit includes an operational amplifier arranged in a negative feedback configuration. The operational amplifier includes: an input stage, a gain stage and an output stage. The output stage includes a second NMOS transistor and a second PMOS transistor. A gate of the second NMOS transistor receives a first control signal, a drain of the second NMOS transistor is coupled to a gate of a first PMOS transistor, and a source of the second NMOS transistor is coupled to a second reference voltage. A gate of the second PMOS transistor receives a second control signal, a drain of the second PMOS transistor is coupled to a gate of a first NMOS transistor, and a source of the second PMOS transistor is coupled to a third reference voltage.
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