Invention Grant
- Patent Title: Semiconductor module and wire bonding method
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Application No.: US17188221Application Date: 2021-03-01
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Publication No.: US11581252B2Publication Date: 2023-02-14
- Inventor: Takafumi Yamada , Kohei Yamauchi , Tatsuhiko Asai , Hiromichi Gohara
- Applicant: Fuji Electric Co., Ltd.
- Applicant Address: JP Kanagawa
- Assignee: Fuji Electric Co., Ltd.
- Current Assignee: Fuji Electric Co., Ltd.
- Current Assignee Address: JP Kanagawa
- Agency: Chen Yoshimura LLP
- Priority: JPJP2020-043932 20200313
- Main IPC: H01L25/07
- IPC: H01L25/07 ; H01L23/498 ; H01L23/538 ; H01L23/00 ; H01L25/18

Abstract:
A semiconductor module includes at least two semiconductor elements connected in parallel; a control circuit board placed between the at least two semiconductor elements; a control terminal for external connection; a first wiring member that connects the control terminal and the control circuit board; and a second wiring member that connects a control electrode of one of the at least two semiconductor elements and the control circuit board, wherein the second wiring member is wire-bonded from the control electrode towards the control circuit board, and has a first end on the control electrode and a second end on the control circuit board, the first end having a cut end face facing upward normal to a surface of the control electrode and the second end having a cut end face facing sideways parallel to a surface of the control circuit board.
Public/Granted literature
- US20210287978A1 SEMICONDUCTOR MODULE AND WIRE BONDING METHOD Public/Granted day:2021-09-16
Information query
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