Invention Grant
- Patent Title: Multi-layer channel structures and methods of fabricating the same in field-effect transistors
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Application No.: US17155775Application Date: 2021-01-22
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Publication No.: US11581415B2Publication Date: 2023-02-14
- Inventor: Guan-Lin Chen , Kuo-Cheng Chiang , Shi Ning Ju , Chih-Hao Wang , Kuan-Lun Cheng
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/786 ; H01L27/088 ; H01L29/165 ; H01L21/8234 ; H01L29/66

Abstract:
A semiconductor structure includes a first stack of semiconductor layers disposed over a semiconductor substrate, where the first stack of semiconductor layers includes a first SiGe layer and a plurality of Si layers disposed over the first SiGe layer and the Si layers are substantially free of Ge, and a second stack of semiconductor layers disposed adjacent to the first stack of semiconductor layers, where the second stack of semiconductor layers includes the first SiGe layer and a plurality of second SiGe layers disposed over the first SiGe layer, and where the first SiGe layer and the second SiGe layers have different compositions. The semiconductor structure further includes a first metal gate stack interleaved with the first stack of semiconductor layers to form a first device and a second metal gate stack interleaved with the second stack of semiconductor layers to form a second device different from the first device.
Public/Granted literature
- US20210336024A1 Multi-Layer Channel Structures And Methods Of Fabricating The Same In Field-Effect Transistors Public/Granted day:2021-10-28
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