Invention Grant
- Patent Title: Method of driving a capacitive load, corresponding circuit and device
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Application No.: US16738419Application Date: 2020-01-09
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Publication No.: US11581892B2Publication Date: 2023-02-14
- Inventor: Marco Zamprogno
- Applicant: STMicroelectronics S.r.l.
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Agency: Slater Matsil, LLP
- Priority: IT102019000001023 20190123
- Main IPC: H03K17/687
- IPC: H03K17/687 ; H01L41/04 ; H03K4/02

Abstract:
A method includes pre-charging a parasitic capacitance of a control node that is coupled to a control terminal of first and second transistors that have respective current paths that form a switched current path coupled between a load node and a storage node. Pre-charging the parasitic capacitance includes: making conductive a first auxiliary transistor that has a current path coupled between the storage node and the control node, or making conductive a second auxiliary transistor that has a current path coupled between the load node and the control node. The method further includes, after pre-charging the parasitic capacitance, making the switched current path conductive to couple the load node to the storage node.
Public/Granted literature
- US20200233206A1 METHOD OF DRIVING A CAPACITIVE LOAD, CORRESPONDING CIRCUIT AND DEVICE Public/Granted day:2020-07-23
Information query
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