Invention Grant
- Patent Title: Display panel including barrier holes formed through stack of planarization layer and pixel defining layer
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Application No.: US16627313Application Date: 2019-12-17
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Publication No.: US11587993B2Publication Date: 2023-02-21
- Inventor: Jinxing Chu , Jinchuan Li
- Applicant: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Applicant Address: CN Shenzhen
- Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Current Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
- Current Assignee Address: CN Shenzhen
- Priority: CN201911243020.0 20191206
- International Application: PCT/CN2019/125880 WO 20191217
- International Announcement: WO2021/109235 WO 20210610
- Main IPC: H01L27/32
- IPC: H01L27/32 ; H01L51/52 ; H01L51/56

Abstract:
A display panel and a manufacturing method thereof are provided in the present application. The display panel includes a substrate, a planarization layer disposed on the substrate, and a pixel definition layer disposed on the planarization layer. The display panel includes a test region, wherein a plurality of virtual pixel openings are disposed in the pixel definition layer positioned in the test region, and a plurality of barrier holes in a one-to-one correspondence to the virtual pixel openings are disposed in the planarization layer positioned in the test region, and a barrier layer fills each of the barrier holes.
Public/Granted literature
- US20210327978A1 DISPLAY PANEL AND MANUFACTURING METHOD THEREOF Public/Granted day:2021-10-21
Information query
IPC分类: