Invention Grant
- Patent Title: Circuit structure with gate configuration
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Application No.: US17175368Application Date: 2021-02-12
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Publication No.: US11588038B2Publication Date: 2023-02-21
- Inventor: Ru-Shang Hsiao , Ying Hsin Lu , Ching-Hwanq Su , Pin Chia Su , Ling-Sung Wang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L27/088 ; H01L29/40 ; H01L29/786

Abstract:
The present disclosure provides a semiconductor structure in accordance with some embodiment. The semiconductor structure includes a semiconductor substrate having a first circuit region and a second circuit region; active regions extended from the semiconductor substrate and surrounded by isolation features; first transistors that include first gate stacks formed on the active regions and disposed in the first circuit region, the first gate stacks having a first gate pitch less than a reference pitch; and second transistors that include second gate stacks formed on the active regions and disposed in the second circuit region, the second gate stacks having a second pitch greater than the reference pitch. The second transistors are high-frequency transistors and the first transistors are logic transistors.
Public/Granted literature
- US20210305386A1 Circuit Structure with Gate Configuration Public/Granted day:2021-09-30
Information query
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