Invention Grant
- Patent Title: Wiring substrate, semiconductor package and method of manufacturing wiring substrate
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Application No.: US17497158Application Date: 2021-10-08
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Publication No.: US11594478B2Publication Date: 2023-02-28
- Inventor: Tomoaki Machida
- Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Applicant Address: JP Nagano
- Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee Address: JP Nagano
- Agency: Rankin, Hill & Clark LLP
- Priority: JPJP2019-053623 20190320
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/00 ; H01L21/48

Abstract:
A second wiring layer is connected to a first wiring layer via an insulating layer. The second wiring layer comprises pad structures. Each pad structure includes a first metal layer formed on the insulating layer, a second metal layer formed on the first metal layer, and a third metal layer formed on the second metal layer. The pad structures comprises a first pad structure and a second pad structure. A via-wiring diameter of the first pad structure is different from a via-wiring diameter of the second pad structure. A distance from an upper surface of the insulating layer to an upper surface of the second metal layer of the first pad structure is the same as a distance from the upper surface of the insulating layer to an upper surface of the second metal layer of the second pad structure.
Information query
IPC分类: