Invention Grant
- Patent Title: Method for manufacturing semiconductor structure
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Application No.: US17392460Application Date: 2021-08-03
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Publication No.: US11594540B2Publication Date: 2023-02-28
- Inventor: Lu-Wei Chung
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L27/108 ; H01L21/768 ; H01L23/532

Abstract:
The present disclosure provides a method of manufacturing a semiconductor structure. The method includes: receiving a substrate; forming a bit line structure on a top surface of the substrate; forming a spacer structure on the bit line structure, the spacer structure including a sacrificial layer sandwiched by a first dielectric layer and a second dielectric layer; removing the sacrificial layer to form a gap between the first dielectric layer and the second dielectric layer; reducing a width of the gap; and forming a seal layer to seal the gap.
Public/Granted literature
- US20210366912A1 METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE Public/Granted day:2021-11-25
Information query
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