Invention Grant
- Patent Title: Method for producing a semiconductor module arrangement
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Application No.: US15858970Application Date: 2017-12-29
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Publication No.: US11596077B2Publication Date: 2023-02-28
- Inventor: Patrick Jones , Christoph Koch , Michael Sielaff
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Priority: DE102013100701.5 20130124
- Main IPC: H05K7/02
- IPC: H05K7/02 ; H05K7/14 ; H05K7/20

Abstract:
A method of producing a semiconductor module arrangement includes providing a first subassembly having a number N1 of first adjustment openings, a second subassembly having a number N2 of second adjustment openings and a third subassembly having a plurality of adjustment pins which are fixedly connected to one another, the first subassembly, the second subassembly and the third subassembly being independent of one another and not connected to one another. The first subassembly, the second subassembly and the third subassembly are arranged relative to one another in such a way that each of the adjustment pins engages into one of the first adjustment openings and/or into one of the second adjustment openings.
Public/Granted literature
- US20180146566A1 Method for Producing a Semiconductor Module Arrangement Public/Granted day:2018-05-24
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