Invention Grant
- Patent Title: Semiconductor device having plural signal buses for multiple purposes
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Application No.: US17108973Application Date: 2020-12-01
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Publication No.: US11599484B2Publication Date: 2023-03-07
- Inventor: Kyoka Egami , Hayato Oishi , Mitsuki Koda
- Applicant: MICRON TECHNOLOGY, INC.
- Applicant Address: US ID Boise
- Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee: MICRON TECHNOLOGY, INC.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G06F13/16
- IPC: G06F13/16 ; G11C7/10

Abstract:
Disclosed herein is a method for designing a semiconductor device, the method including: assigning a plurality of wiring tracks including first and second tracks; connecting a first data I/O circuit to a first data node of a first circuit by a first signal bus arranged on the first wiring track; connecting a second data I/O circuit to a second data node of the first circuit by a second signal bus arranged on the second wiring track when a first design mode is selected; and connecting the first data I/O circuit to a second circuit by a second signal bus arranged on the second wiring track when a second design mode is selected.
Public/Granted literature
- US20220171722A1 SEMICONDUCTOR DEVICE HAVING PLURAL SIGNAL BUSES FOR MULTIPLE PURPOSES Public/Granted day:2022-06-02
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