Invention Grant
- Patent Title: Semiconductor device and a method of manufacturing the same
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Application No.: US17343448Application Date: 2021-06-09
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Publication No.: US11600522B2Publication Date: 2023-03-07
- Inventor: Katsuhiko Hotta , Kyoko Sasahara
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: SGPatents PLLC
- Priority: JP2005-197938 20050706
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L21/8238 ; H01L23/525 ; H01L23/532 ; H01L23/00 ; H01L23/522 ; H01L23/528 ; H01L21/8234
Abstract:
For simplifying the dual-damascene formation steps of a multilevel Cu interconnect, a formation step of an antireflective film below a photoresist film is omitted. Described specifically, an interlayer insulating film is dry etched with a photoresist film formed thereover as a mask, and interconnect trenches are formed by terminating etching at the surface of a stopper film formed in the interlayer insulating film. The stopper film is made of an SiCN film having a low optical reflectance, thereby causing it to serve as an antireflective film when the photoresist film is exposed.
Public/Granted literature
- US20210296165A1 SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME Public/Granted day:2021-09-23
Information query
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