Invention Grant
- Patent Title: Routing structure between dies and method for arranging routing between dies
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Application No.: US17198262Application Date: 2021-03-11
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Publication No.: US11600572B2Publication Date: 2023-03-07
- Inventor: Wei-Chieh Liao , Hao-Yu Tung , Yu-Cheng Sun , Ming-Hsuan Wang , Igor Elkanovich
- Applicant: Global Unichip Corporation , Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu; TW Hsinchu
- Assignee: Global Unichip Corporation,Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Global Unichip Corporation,Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu; TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L25/065 ; H01L25/00 ; H01L21/48 ; H01L23/498

Abstract:
A routing structure between dies is provided, including a trace layer, disposed on a substrate, wherein a plurality of routing paths is embedded in the trace layer. In addition, a first die and a second die are disposed on the trace layer and connected by the routing paths. A spacing gap between the first die and the second die is along a first direction and interfacing edges of the first die and the second die are extending along a second direction perpendicular to the first direction. Each of the routing paths includes a first straight portion in parallel to connect to the interfacing edges. The first straight portion has a slant angle with respect to the first direction other than 0° and 90°.
Public/Granted literature
- US20220293526A1 ROUTING STRUCTURE BETWEEN DIES AND METHOD FOR ARRANGING ROUTING BETWEEN DIES Public/Granted day:2022-09-15
Information query
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