Invention Grant
- Patent Title: Differential cascode amplifier arrangement with reduced common mode gate RF voltage
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Application No.: US17214712Application Date: 2021-03-26
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Publication No.: US11601098B2Publication Date: 2023-03-07
- Inventor: Dan William Nobbe
- Applicant: pSemi Corporation
- Applicant Address: US CA San Diego
- Assignee: pSemi Corporation
- Current Assignee: pSemi Corporation
- Current Assignee Address: US CA San Diego
- Agency: Steinfl + Bruno LLP
- Main IPC: H03F1/22
- IPC: H03F1/22 ; H03F3/45 ; H03F1/32

Abstract:
Methods and devices for reducing gate node instability of a differential cascode amplifier are presented. Ground return loops, and therefore corresponding parasitic inductances, are eliminated by using voltage symmetry at nodes of two cascode amplification legs of the differential cascode amplifier. Series connected capacitors are coupled between gate nodes of pairs of cascode amplifiers of the two cascode amplification legs so to create a common node connecting the two capacitors. In order to reduce peak to peak voltage variation at the common node under large signal conditions, a shunting capacitor is connected to the common node.
Public/Granted literature
- US20220311390A1 DIFFERENTIAL CASCODE AMPLIFIER ARRANGEMENT WITH REDUCED COMMON MODE GATE RF VOLTAGE Public/Granted day:2022-09-29
Information query
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