Invention Grant
- Patent Title: Memory and sense amplifying device thereof
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Application No.: US17390707Application Date: 2021-07-30
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Publication No.: US11605406B2Publication Date: 2023-03-14
- Inventor: Yen-Ning Chiang , Shang-Chi Yang
- Applicant: MACRONIX International Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: MACRONIX International Co., Ltd.
- Current Assignee: MACRONIX International Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: J.C. Patents
- Main IPC: G11C7/02
- IPC: G11C7/02 ; G11C7/06 ; G11C7/12

Abstract:
A sense amplifying device includes a bit line bias voltage adjuster and a sense amplifying circuit. The bit line bias voltage adjuster receives a power voltage to be an operation voltage. The bit line bias voltage adjuster includes a first amplifier, a first transistor and a first current source. The first amplifier, based on the power voltage, generates an adjusted reference bit line voltage according to a reference bit line voltage and a feedback voltage. The first transistor receives the adjusted reference bit line voltage and generates the feedback voltage, wherein the first transistor is a native transistor. The sense amplifying circuit receives the power voltage to be the operation voltage, and generates a sensing result according to the adjusted reference bit line voltage.
Public/Granted literature
- US20230033935A1 MEMORY AND SENSE AMPLIFYING DEVICE THEREOF Public/Granted day:2023-02-02
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