Invention Grant
- Patent Title: Multilayer-type on-chip inductor structure
-
Application No.: US17342684Application Date: 2021-06-09
-
Publication No.: US11605590B2Publication Date: 2023-03-14
- Inventor: Sheng-Yuan Lee
- Applicant: VIA LABS, INC.
- Applicant Address: TW New Taipei
- Assignee: VIA LABS, INC.
- Current Assignee: VIA LABS, INC.
- Current Assignee Address: TW New Taipei
- Agency: McClure, Qualey & Rodack, LLP
- Priority: TW110103222 20210128
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01F27/28 ; H01L49/02

Abstract:
A multilayer-type on-chip inductor with a conductive structure includes an insulating redistribution layer disposed on an inter-metal dielectric layer, a first spiral trace layer disposed in the insulating redistribution layer, and a second spiral trace layer disposed in the inter-metal dielectric layer and correspondingly formed below the first spiral trace layer. The inter-metal dielectric layer has a separating region to divide the second spiral trace layer into line segments. First slit openings each passes through a corresponding line segment, and extends in an extending direction of a length of the corresponding line segment.
Public/Granted literature
- US20220238435A1 MULTILAYER-TYPE ON-CHIP INDUCTOR STRUCTURE Public/Granted day:2022-07-28
Information query
IPC分类: