Invention Grant
- Patent Title: Semiconductor device with spacer over bonding pad
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Application No.: US17572793Application Date: 2022-01-11
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Publication No.: US11605606B2Publication Date: 2023-03-14
- Inventor: Chun-Chi Lai
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agent Xuan Zhang
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L23/522 ; H01L23/532 ; H01L21/768 ; H01L29/417 ; H01L29/423

Abstract:
The present application provides a semiconductor device. The semiconductor device includes a bonding pad disposed over a semiconductor substrate; a first spacer disposed over a top surface of the bonding pad; a second spacer disposed over a sidewall of the bonding pad; a dielectric layer between the bonding pad and the semiconductor substrate. The dielectric layer includes silicon-rich oxide; and a conductive bump disposed over the first passivation layer. The conductive bump is electrically connected to a source/drain (S/D) region in the semiconductor substrate through the bonding pad. The semiconductor device also includes a dielectric liner disposed between the first spacer and the bonding pad; and a first passivation layer covering the second spacer, wherein the dielectric liner is L-shaped, and the first spacer is separated from the bonding pad by the dielectric liner.
Public/Granted literature
- US20220130779A1 SEMICONDUCTOR DEVICE WITH SPACER OVER BONDING PAD Public/Granted day:2022-04-28
Information query
IPC分类: