Invention Grant
- Patent Title: Via structures of passive semiconductor devices
-
Application No.: US17027661Application Date: 2020-09-21
-
Publication No.: US11610837B2Publication Date: 2023-03-21
- Inventor: Xuesong Rao , Benfu Lin , Bo Li , Chengang Feng , Yudi Setiawan , Yun Ling Tan
- Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Current Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agent Anthony Canale
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/532 ; H01L21/768
Abstract:
A semiconductor device is provided, which includes a dielectric layer and a via structure. The dielectric layer is arranged over a substrate. The via structure is arranged in the dielectric layer, the via structure having a peripheral portion and a central portion. The peripheral portion of the via structure has a height that is greater than that of the central portion.
Public/Granted literature
- US20220093508A1 VIA STRUCTURES OF PASSIVE SEMICONDUCTOR DEVICES Public/Granted day:2022-03-24
Information query
IPC分类:
