Invention Grant
- Patent Title: 3D semiconductor apparatus manufactured with a plurality of substrates and method of manufacture thereof
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Application No.: US17062142Application Date: 2020-10-02
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Publication No.: US11610993B2Publication Date: 2023-03-21
- Inventor: Mark I. Gardner , H. Jim Fulford
- Applicant: Tokyo Electron Limited
- Applicant Address: JP Tokyo
- Assignee: Tokyo Electron Limited
- Current Assignee: Tokyo Electron Limited
- Current Assignee Address: JP Tokyo
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L23/00
Abstract:
Aspects of the disclosure provide a method of forming a semiconductor apparatus including a first portion and a second portion. The first portion is formed on a first substrate and includes at least one first semiconductor device. The second portion is formed on a second substrate including a bulk substrate material and includes at least one second semiconductor device. A carrier substrate is attached to the second portion. The bulk substrate material is removed from the second substrate. The first portion and the second portion are bonded to form the semiconductor apparatus where the at least one second semiconductor device is stacked above the at least one first semiconductor device along a Z direction substantially perpendicular to a substrate plane of the first substrate. The at least one first semiconductor device and the at least one second semiconductor device are positioned between the carrier substrate and the first substrate.
Public/Granted literature
- US20210175358A1 3D SEMICONDUCTOR APPARATUS MANUFACTURED WITH A PLURALITY OF SUBSTRATES AND METHOD OF MANUFACTURE THEREOF Public/Granted day:2021-06-10
Information query
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