- Patent Title: Reconfigurable DAC implemented by memristor based neural network
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Application No.: US16629607Application Date: 2018-07-11
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Publication No.: US11611352B2Publication Date: 2023-03-21
- Inventor: Shahar Kvatinsky , Loai Danial
- Applicant: Technion Research & Development Foundation Limited
- Applicant Address: IL Haifa
- Assignee: Technion Research & Development Foundation Limited
- Current Assignee: Technion Research & Development Foundation Limited
- Current Assignee Address: IL Haifa
- International Application: PCT/IL2018/050759 WO 20180711
- International Announcement: WO2019/012533 WO 20190117
- Main IPC: H03M1/66
- IPC: H03M1/66 ; H03M1/80

Abstract:
A digital to analog converter is constructed using a neural network layer. The converter has inputs for receiving parallel bits of a digital input signal and an output for outputting an analog signal which is based on the digital input. Connecting the input and the output is a neural network layer which is configured to convert the parallel bits into an output analog signal that is representative of the digital input signal. The neural network may be hardwired and the synapses may rely on memristors as programmable elements.
Public/Granted literature
- US20210143834A1 RECONFIGURABLE DAC IMPLEMENTED BY MEMRISTOR BASED NEURAL NETWORK Public/Granted day:2021-05-13
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