Invention Grant
- Patent Title: Re-assembly middleware in FPGA for processing TCP segments into application layer messages
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Application No.: US17207786Application Date: 2021-03-22
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Publication No.: US11611638B2Publication Date: 2023-03-21
- Inventor: Dhaval Shah , Sunil Puranik , Manoj Nambiar , Mahesh Damodar Barve , Ishtiyaque Shaikh
- Applicant: Tata Consultancy Services Limited
- Applicant Address: IN Mumbai
- Assignee: Tata Consultancy Services Limited
- Current Assignee: Tata Consultancy Services Limited
- Current Assignee Address: IN Mumbai
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, LLP
- Priority: IN202121003213 20210122
- Main IPC: H04L69/12
- IPC: H04L69/12 ; H04L49/9057 ; H04L69/166

Abstract:
A method and system of a re-assembly middleware in FPGA for processing TCP segments into application layer messages is disclosed. In recent years, the communication speed in digital systems has increased drastically and thus has brought in a growing need to ensure a good/high performance from the FPGA services. The disclosure proposes a re-assembly middleware in the FPGA for processing TCP segments into application layer messages at a pre-defined frequency for a good/high performance. The pre-defined frequency is a high frequency performance feature of the re-assembly middleware, wherein the FPGA's implementation frequency is at atleast 300 MHz based on a memory optimization technique. The memory optimization technique includes several strategies such registering an output and slicing memories.
Public/Granted literature
- US20220272178A1 RE-ASSEMBLY MIDDLEWARE IN FPGA FOR PROCESSING TCP SEGMENTS INTO APPLICATION LAYER MESSAGES Public/Granted day:2022-08-25
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