In a method and system for identifying addresses of slave devices, the system includes a main board, slave devices, and a power source. The main board is electrically connected to the slave devices and a delay unit is set in each slave device. An output terminal of the delay unit is electrically connected to the main board. The delay unit outputs a delay signal to the main board when first powered on, the main board receives the delay signal, computes a delay time of the delay signal, and by reference to a preset table identifies the slave device based on the specific delay time. Occupation of input and output I/O pins is reduced, a device for identifying addresses of slave devices is also disclosed.