A memory device includes an open-for-contact region located between the memory blocks, and a row decoder disposed between global lines to which an operating voltage is supplied and the local lines and configured to transfer the operating voltage to one memory block among the memory blocks in response to a row address, wherein a plurality of contacts are formed in the open-for-contact region and configured to transmit a voltage between the bit lines and a peripheral circuit, wherein a dummy region is included in the row decoder and disposed paced apart from the open-for-contact region in the second direction, and wherein a discharge switch is included in the dummy region and configured to discharge the global lines in response to a discharge signal.