Invention Grant
- Patent Title: Memory readout circuit and method
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Application No.: US17671372Application Date: 2022-02-14
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Publication No.: US11615860B2Publication Date: 2023-03-28
- Inventor: Chih-Min Liu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Hauptman Ham, LLP
- Main IPC: G11C17/18
- IPC: G11C17/18 ; G11C11/16 ; G11C17/16

Abstract:
A circuit includes an array of OTP cells, an array of NVM cells, an amplifier coupled to each of the array of OTP cells and the array of NVM cells, and a control circuit configured to generate one or more control signals. Responsive to the one or more control signals, the amplifier is configured to generate an output voltage based on a current received from the array of OTP cells in a first configuration, and generate the output voltage based on a voltage received from the array of NVM cells in a second configuration.
Public/Granted literature
- US20220165344A1 MEMORY READOUT CIRCUIT AND METHOD Public/Granted day:2022-05-26
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