Invention Grant
- Patent Title: Delamination sensor
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Application No.: US17365699Application Date: 2021-07-01
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Publication No.: US11616029B2Publication Date: 2023-03-28
- Inventor: Chih-Hsuan Tai , Ming-Chung Wu , Kuo-Wen Chen , Hsiang-Tai Lu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/58
- IPC: H01L23/58 ; H01L23/528 ; H01L23/522 ; H01L23/498

Abstract:
Semiconductor structures and methods of testing the same are provided. A semiconductor structure according to the present disclosure includes a substrate, a semiconductor device over the substrate, wherein the semiconductor device includes an interconnect structure, and the interconnect structure includes a plurality of metallization layers disposed in a dielectric layer; and a delamination sensor. The delamination sensor includes a connecting structure and a plurality of contact vias in at least one of the plurality of metallization layers. The connecting structure bonds the semiconductor device to the substrate and does not functionally couple the semiconductor device to the substrate. The plurality of contact vias fall within a first region of a vertical projection area of the connecting structure but do not overlap a second region of the vertical projection area.
Public/Granted literature
- US20220375877A1 DELAMINATION SENSOR Public/Granted day:2022-11-24
Information query
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