Invention Grant
- Patent Title: Slew rate limiter systems, devices, and methods
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Application No.: US16558063Application Date: 2019-08-31
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Publication No.: US11618672B2Publication Date: 2023-04-04
- Inventor: David Zimlich , Arthur S. Morris, III
- Applicant: AAC Technologies Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: AAC Technologies Pte. Ltd.
- Current Assignee: AAC Technologies Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: W&G Law Group
- Main IPC: B81B7/00
- IPC: B81B7/00 ; B81B7/02 ; H01G5/16 ; H01G5/011 ; H02M3/07

Abstract:
Devices, systems, and methods for limiting a slew rate of a driven device. In some embodiments, the device for limiting a slew rate of the driven device includes one or more slew rate limiting field-effect transistors (FETS) connected between a first circuit node and a node of the driven device, and a first control circuit. In some embodiments, the one or more first slew rate limiting FETs and the first control circuit are configured to set a rate at which the driven device is charged or discharged. In some embodiments, the first control circuit is within a voltage divider and the current flowing through the voltage divider is proportionally mirrored to the one or more first slew rate limiting FETs wherein the current mirror ratio is selected to ensure that a rate at which a capacitance of the driven device changes over time is below a specified limit.
Public/Granted literature
- US20200071158A1 SLEW RATE LIMITER SYSTEMS, DEVICES, AND METHODS Public/Granted day:2020-03-05
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