Probe card for testing a pattern formed on a wafer
Abstract:
A probe card is configured to perform a circuit test on a wafer to realize a reduction in size and pitch of probe insertion holes. The probe card includes a first plate, a second plate coupled to a lower portion of the first plate, an upper guide plate provided on an upper surface of the first plate, a lower guide plate provided on a lower surface of the second plate, and a reinforcing plate coupled to at least a surface of each of the upper and lower guide plates. At least one of the upper and lower guide plates is made of an anodic oxide film material, and as viewed from above, the upper and lower guide plates and the reinforcing plate are configured to have smaller areas than the first and second plates, so that upper and lower surfaces of the first and second plates are exposed.
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