Invention Grant
- Patent Title: Cache system with a primary cache and an overflow cache that use different indexing schemes
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Application No.: US14889113Application Date: 2014-12-12
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Publication No.: US11620220B2Publication Date: 2023-04-04
- Inventor: Colin Eddy , Rodney E. Hooker
- Applicant: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Applicant Address: CN Shanghai
- Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Current Assignee: VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Current Assignee Address: CN Shanghai
- Agency: McClure, Qualey & Rodack, LLP
- International Application: PCT/IB2014/003159 WO 20141212
- International Announcement: WO2016/009247 WO 20160121
- Main IPC: G06F12/0811
- IPC: G06F12/0811 ; G06F12/1027 ; G06F12/1045 ; G06F12/0864 ; G06F12/0808 ; G06F12/123

Abstract:
A cache memory system including a primary cache and an overflow cache that are searched together using a search address. The overflow cache operates as an eviction array for the primary cache. The primary cache is addressed using bits of the search address, and the overflow cache is addressed by a hash index generated by a hash function applied to bits of the search address. The hash function operates to distribute victims evicted from the primary cache to different sets of the overflow cache to improve overall cache utilization. A hash generator may be included to perform the hash function. A hash table may be included to store hash indexes of valid entries in the primary cache. The cache memory system may be used to implement a translation lookaside buffer for a microprocessor.
Public/Granted literature
- US20160170884A1 CACHE SYSTEM WITH A PRIMARY CACHE AND AN OVERFLOW CACHE THAT USE DIFFERENT INDEXING SCHEMES Public/Granted day:2016-06-16
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