Invention Grant
- Patent Title: Thermal management solutions that reduce inductive coupling between stacked integrated circuit devices
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Application No.: US16040748Application Date: 2018-07-20
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Publication No.: US11621208B2Publication Date: 2023-04-04
- Inventor: Feras Eid , Adel Elsherbini , Johanna Swan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Essential Patents Group, LLP.
- Main IPC: H01L23/367
- IPC: H01L23/367 ; H01L25/065 ; H01L23/498

Abstract:
An integrated circuit assembly may be formed having a substrate, a first integrated circuit device electrically attached to the substrate, a second integrated circuit device electrically attached to the first integrated circuit device, and a heat dissipation device comprising at least one first thermally conductive structure proximate at least one of the first integrated circuit device, the second integrated circuit device, and the substrate; and a second thermally conductive structure disposed over the first thermally conductive structure(s), the first integrated circuit device, and the second integrated circuit device, wherein the first thermally conductive structure(s) have a lower electrical conductivity than an electrical conductivity of the second thermally conductive structure. The first thermally conductive structure(s) may be formed by an additive process or may be pre-formed and attached to at least one of the first integrated circuit device, the second integrated circuit device, and the substrate.
Public/Granted literature
- US20200027812A1 THERMAL MANAGEMENT SOLUTIONS THAT REDUCE INDUCTIVE COUPLING BETWEEN STACKED INTEGRATED CIRCUIT DEVICES Public/Granted day:2020-01-23
Information query
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