Invention Grant
- Patent Title: Electrostatic discharge protection in integrated circuits using positive temperature coefficient material
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Application No.: US16728278Application Date: 2019-12-27
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Publication No.: US11621236B2Publication Date: 2023-04-04
- Inventor: Feras Eid , Veronica Aleman Strong , Aleksandar Aleksov , Adel A. Elsherbini , Johanna M. Swan
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Akona IP PC
- Main IPC: H01L23/60
- IPC: H01L23/60 ; H01L23/34 ; H01L23/498 ; H01L23/532 ; H01L23/13 ; H01L23/538 ; H01L25/065 ; H01L25/10

Abstract:
Disclosed herein are structures, devices, and methods for electrostatic discharge protection (ESDP) in integrated circuits (ICs). In some embodiments, an IC package support may include: a first conductive structure; a second conductive structure; and a material in contact with the first conductive structure and the second conductive structure, wherein the material includes a positive temperature coefficient material.
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