Embodiments of the present disclosure provide a scheme for decoding over a small subgraph which highly likely includes some errors. A controller is configured to: control the first decoder to decode the data, read from the memory device, using a parity check matrix for the error correction code; extract one or more subgraphs from the entire bipartite graph of the parity check matrix, which is defined by a plurality of variable nodes and a plurality of check nodes when a particular condition satisfied; and control the second decoder to decode the decoding result of the first decoder using a submatrix of the parity check matrix corresponding to the extracted subgraphs.