Invention Grant
- Patent Title: Wafer inspection method and wafer
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Application No.: US16765529Application Date: 2018-11-09
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Publication No.: US11624902B2Publication Date: 2023-04-11
- Inventor: Yumi Kuramoto , Katsumi Shibayama , Takashi Kasahara , Masaki Hirose , Toshimitsu Kawai , Hiroki Oyama
- Applicant: HAMAMATSU PHOTONICS K.K.
- Applicant Address: JP Hamamatsu
- Assignee: HAMAMATSU PHOTONICS K.K.
- Current Assignee: HAMAMATSU PHOTONICS K.K.
- Current Assignee Address: JP Hamamatsu
- Agency: Faegre Drinker Biddle & Reath LLP
- Priority: JPJP2017-226094 20171124
- International Application: PCT/JP2018/041721 WO 20181109
- International Announcement: WO2019/102875 WO 20190531
- Main IPC: G02B26/00
- IPC: G02B26/00 ; G01N21/45 ; G01N21/95 ; H01L27/144 ; H01L31/0203 ; H01L31/0216

Abstract:
A wafer includes a substrate layer, a first mirror layer having a plurality of two-dimensionally arranged first mirror portions, and a second mirror layer having a plurality of two-dimensionally arranged second mirror portions. In the wafer, a gap is formed between the first mirror portion and the second mirror portion so as to form a plurality of Fabry-Perot interference filter portions. A wafer inspection method according to an embodiment includes a step of performing faulty/non-faulty determination of each of the plurality of Fabry-Perot interference filter portions, and a step of applying ink to at least part of a portion overlapping the gap when viewed in a facing direction on the second mirror layer of the Fabry-Perot interference filter portion determined as faulty.
Public/Granted literature
- US20200310104A1 WAFER INSPECTION METHOD AND WAFER Public/Granted day:2020-10-01
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