Invention Grant
- Patent Title: Clock distribution circuit and semiconductor apparatus including the same
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Application No.: US17226952Application Date: 2021-04-09
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Publication No.: US11625062B2Publication Date: 2023-04-11
- Inventor: Ji Hyo Kang , Kyung Hoon Kim , Jae Hyeok Yang , Sang Yeon Byeon , Gang Sik Lee , Joo Hyung Chae
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2020-0155737 20201119
- Main IPC: G06F1/10
- IPC: G06F1/10 ; H03K19/096

Abstract:
Devices for reducing power consumption and skew for transmission of signals in a clock distribution circuit are described. A global distribution circuit is configured to divide external clock signals to generate first divided multiphase clock signals and divide one of the first divided multiphase clock signals to generate a reference clock signal. A local distribution circuit is configured to generate second divided multiphase clock signals according to a portion of the first divided multiphase clock signals and the reference clock signal.
Public/Granted literature
- US20220155814A1 CLOCK DISTRIBUTION CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME Public/Granted day:2022-05-19
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