A controlled quantum logic gate implements a n−1 qubit controlled Z gate function based on n qubits and an ancilla qubit, wherein n is greater than 3. The quantum logic gate includes a plurality of leading gates that operate on the at least one ancilla qubit to generate an ancilla qubit state in response to an initial state of the ancilla bit and each of the n qubits. A measurement operates on the ancilla qubit state to generate a classical ancilla bit state. At least one following gate includes at least one controlled Z gate equivalent that operates under control of at least one of the n qubits and further under control of the classical ancilla bit state to selectively apply a phase adjustment to at least another one of the n qubits.