A low power SRAM (static RAM) for an image sensor includes a voltage generation circuit for providing a positive supply voltage VP and a negative supply VN, wherein VDD>Vp>Vn>Vgnd; a plurality of memory cells coupled to a respective plurality of column sense lines in a pixel array, the plurality of memory cells receiving differential inputs dp and dn; and a Gray counter coupled to switchably couple VP and VN to the differential inputs dp and dn of the plurality of memory cells. A method of operating an image sensor with a low power SRAM includes acquiring an image by the image sensor; generating VP and VN such that VDD>VP>VN>Vgnd; receiving an output g of a column of pixels at a clock input of a memory cell; and switchably coupling VP and VN to the differential inputs dp and dn of a plurality of memory cells in the SRAM according to a codeword from a Gray counter.