Invention Grant
- Patent Title: Method and storage system with a non-volatile bad block read cache using partial blocks
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Application No.: US17397245Application Date: 2021-08-09
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Publication No.: US11626183B2Publication Date: 2023-04-11
- Inventor: Kalpit Bordia , Gautam Dusija
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Crowell & Moring LLP
- Main IPC: G11C29/42
- IPC: G11C29/42 ; G11C16/34 ; G11C29/00 ; G11C29/44

Abstract:
A storage system has a memory with a multi-level cell (MLC) block and a partially-bad single-level cell (SLC) block. The storage system repurposes the partially-bad SLC block as a non-volatile read cache for data stored in the MLC block (e.g., cold data that is read relatively frequently) to improve performance of host reads. Because the original version of the data is still stored in the MLC block, the original version of the data can be read if there is an error in the copy of the data stored in the partially-bad SLC block, thus avoiding the need for extensive error-correction handling to account for the poor reliability of the partially-bad SLC block.
Public/Granted literature
- US20230045156A1 Method and Storage System with a Non-Volatile Bad Block Read Cache Using Partial Blocks Public/Granted day:2023-02-09
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