Invention Grant
- Patent Title: Biased amplifier
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Application No.: US17333395Application Date: 2021-05-28
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Publication No.: US11626848B2Publication Date: 2023-04-11
- Inventor: Sudheer Prasad
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Krista Y. Chan; Frank D. Cimino
- Main IPC: H03F3/45
- IPC: H03F3/45 ; H03G3/30

Abstract:
In one example an amplifier includes a bias circuit, an open-loop gain stage including a first PMOS having a gate coupled to a first node, a source coupled to a second node, a drain coupled to a third node, and a bulk coupled to the bias circuit, a second PMOS having a gate coupled to a ground node, a source coupled to the second node, a drain coupled to a fourth node, and a bulk coupled to the bias circuit, a first NMOS having a drain and a gate coupled to the third node and a source coupled to a fifth node, a second NMOS having a drain coupled to the fourth node, a gate coupled to the third node, and a source coupled to the fifth node, an adjustable resistor coupleable between the third and fourth nodes, and a buffer stage coupled to the open-loop gain stage.
Public/Granted literature
- US20210288624A1 BIASED AMPLIFIER Public/Granted day:2021-09-16
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