Invention Grant
- Patent Title: Technologies for power-aware scheduling for network packet processing
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Application No.: US15951650Application Date: 2018-04-12
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Publication No.: US11630693B2Publication Date: 2023-04-18
- Inventor: John Browne , Chris MacNamara , Tomasz Kantecki , Peter McCarthy , Liang Ma , Mairtin O'Loingsigh , Rory Sexton , John Griffin , Nemanja Marjanovic , David Hunt
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Compass IP Law PC
- Main IPC: G06F9/46
- IPC: G06F9/46 ; G06F9/48 ; H04L47/24 ; G06F1/329 ; H04L9/40 ; H04L47/6275 ; G06F1/3209 ; G06F1/3296 ; G06F1/3234 ; H04L47/625 ; G06F9/50 ; G06F21/60

Abstract:
Technologies for power-aware scheduling include a computing device that receives network packets. The computing device classifies the network packets by priority level and then assigns each network packet to a performance group bin. The packets are assigned based on priority level and other performance criteria. The computing device schedules the network packets assigned to each performance group for processing by a processing engine such as a processor core. Network packets assigned to performance groups having a high priority level are scheduled for processing by processing engines with a high performance level. The computing device may select performance levels for processing engines based on processing workload of the network packets. The computing device may control the performance level of the processing engines, for example by controlling the frequency of processor cores. The processing workload may include packet encryption. Other embodiments are described and claimed.
Public/Granted literature
- US20190042310A1 TECHNOLOGIES FOR POWER-AWARE SCHEDULING FOR NETWORK PACKET PROCESSING Public/Granted day:2019-02-07
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