Invention Grant
- Patent Title: Efficient processing of commands in a memory sub-system
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Application No.: US17322522Application Date: 2021-05-17
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Publication No.: US11630778B2Publication Date: 2023-04-18
- Inventor: Scheheresade Virani , Byron D. Harris
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/0873 ; G06F9/50 ; G06F9/54 ; G06F12/02 ; G06F9/30 ; G06F12/10
Abstract:
A write command is received, for example, from a host system, which operates on a first logical address range. A read command is received that specifies a second logical address range that matches the first logical address range. Responsive to determining that a deallocate command has been received after the write command, zero-filled data is returned in response to the read command.
Public/Granted literature
- US20210271601A1 EFFICIENT PROCESSING OF COMMANDS IN A MEMORY SUB-SYSTEM Public/Granted day:2021-09-02
Information query
