Invention Grant
- Patent Title: Redundancy analysis method and redundancy analysis apparatus
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Application No.: US17508910Application Date: 2021-10-22
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Publication No.: US11631474B2Publication Date: 2023-04-18
- Inventor: Sung Ho Kang , Tae Hyun Kim
- Applicant: UIF (University Industry Foundation), Yonsei University
- Applicant Address: KR Seoul
- Assignee: UIF (University Industry Foundation), Yonsei University
- Current Assignee: UIF (University Industry Foundation), Yonsei University
- Current Assignee Address: KR Seoul
- Agency: Tarolli, Sundheim, Covell & Tummino LLP
- Priority: KR10-2020-0138122 20201023
- Main IPC: G11C29/56
- IPC: G11C29/56 ; G11C29/00

Abstract:
A redundancy analysis method of replacing a faulty part of a memory with at least one spare according to the present embodiment includes: acquiring fault information of the memory; and redundancy-allocating the fault with combinations of the spares to correspond to combination codes corresponding to the combinations of the spares, in which, the redundancy-allocating with the combination of the spare areas includes performing parallel processing on each combination of the spares.
Public/Granted literature
- US20220130486A1 REDUDANCY ANALYSIS METHOD AND REDUDANCY ANALYSIS APPARATUS Public/Granted day:2022-04-28
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