- Patent Title: Semiconductor device and method of testing a semiconductor device
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Application No.: US16923540Application Date: 2020-07-08
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Publication No.: US11631620B2Publication Date: 2023-04-18
- Inventor: Hiroaki Takasu , Yoko Serizawa , Hiroya Suzuki , Sumitaka Goto
- Applicant: ABLIC Inc.
- Applicant Address: JP Tokyo
- Assignee: ABLIC Inc.
- Current Assignee: ABLIC Inc.
- Current Assignee Address: JP Tokyo
- Agency: Crowell & Moring LLP
- Priority: JPJP2019-127013 20190708
- Main IPC: H01L21/66
- IPC: H01L21/66 ; G01R31/28
Abstract:
Provided is a semiconductor device that allows reduction of a measurement time of a PCMTEG and improvement of productivity in an IC manufacturing process. A PCMTEG region 100 formed on a surface of a semiconductor substrate is divided into a main PCMTEG region 101 and a sub-PCMTEG region 102, and TEGs having specifications for their electrical characteristic values are all collectively arranged in the sub-PCMTEG region 102.
Public/Granted literature
- US20210013114A1 SEMICONDUCTOR DEVICE AND METHOD OF TESTING A SEMICONDUCTOR DEVICE Public/Granted day:2021-01-14
Information query
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