Invention Grant
- Patent Title: Method for fabricating semiconductor device with stress-relieving structures
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Application No.: US17751948Application Date: 2022-05-24
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Publication No.: US11631637B2Publication Date: 2023-04-18
- Inventor: Tse-Yao Huang
- Applicant: NANYA TECHNOLOGY CORPORATION
- Applicant Address: TW New Taipei
- Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee: NANYA TECHNOLOGY CORPORATION
- Current Assignee Address: TW New Taipei
- Agent Xuan Zhang
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/498 ; H01L23/00 ; H01L23/528 ; H01L21/48

Abstract:
The present application provides a method for fabricating a semiconductor device including providing a semiconductor substrate, forming a first stress-relieving structure including a first conductive frame above the semiconductor substrate and a plurality of first insulating pillars within the first conductive frame, forming a second stress-relieving structure comprising a plurality of second conductive pillars above the first stress-relieving structure and a second insulating frame, the plurality of second conductive pillars are disposed within the second conductive frame, wherein the plurality of second conductive pillars is disposed correspondingly above the plurality of first insulating pillars, and the second insulating frame is disposed correspondingly above the first conductive frame; and forming a conductive structure including a supporting portion above the second stress-relieving structure, a conductive portion adjacent to the supporting portion, and a plurality of spacers attached to two sides of the conductive portion.
Public/Granted literature
- US20220285258A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH STRESS-RELIEVING STRUCTURES Public/Granted day:2022-09-08
Information query
IPC分类: