Invention Grant
- Patent Title: Method of manufacturing insulated gate semiconductor device with injection suppression structure
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Application No.: US17135682Application Date: 2020-12-28
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Publication No.: US11631765B2Publication Date: 2023-04-18
- Inventor: Akimasa Kinoshita
- Applicant: Fuji Electric Co., Ltd.
- Applicant Address: JP Kanagawa
- Assignee: Fuji Electric Co., Ltd.
- Current Assignee: Fuji Electric Co., Ltd.
- Current Assignee Address: JP Kanagawa
- Agency: Chen Yoshimura LLP
- Priority: JPJP2018-047155 20180314
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/423 ; H01L29/66 ; H01L29/16 ; H01L29/08 ; H01L29/10

Abstract:
A method of manufacturing an insulated gate semiconductor device includes simultaneously forming a gate trench and a contact trench that respectively penetrate form a top of the electrode contact region through a main electrode contact region and a injection control region in a depth direction and respectively reach a charge transport region, the contact trench being disposed at a position laterally separated from the gate trench in a plan view; and embedding a gate electrode inside the gate trench with a gate insulating film interposed therebetween, thereby forming an insulated gate structure, and simultaneously embedding an injection suppression region inside the contact trench, the gate electrode and the injection suppression region being both made of a second semiconductor material having a narrower bandgap than a bandgap of the first semiconductor material of the charge transport region.
Public/Granted literature
- US20210119040A1 METHOD OF MANUFACTURING INSULATED GATE SEMICONDUCTOR DEVICE WITH INJECTION SUPPRESSION STRUCTURE Public/Granted day:2021-04-22
Information query
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