Invention Grant
- Patent Title: Idle-power mitigation circuit
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Application No.: US17205094Application Date: 2021-03-18
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Publication No.: US11640252B2Publication Date: 2023-05-02
- Inventor: Daniel J. Linnen , Gunter Knestele , Kirubakaran Periyannan , San A. Phong
- Applicant: Western Digital Technologies, Inc.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Patterson + Sheridan, LLP
- Agent Steven H. VerSteeg
- Main IPC: G06F3/06
- IPC: G06F3/06

Abstract:
A data storage device includes a memory device, an internal power supply, and a controller. When the data storage device is in an idle power state, the controller is configured to electrically isolate the data storage device from an external power source and draw power from the internal power supply to perform data storage operations. The power utilized for the data storage operations while the data storage device is in the idle power state may be exclusively from the internal power supply or a mixture of the internal power supply and the external power supply. The total power utilized during the idle power state is less than a threshold that is relative to the active power of the data storage device or at a fixed value.
Public/Granted literature
- US20220300171A1 Idle-Power Mitigation Circuit Public/Granted day:2022-09-22
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