Invention Grant
- Patent Title: Memory device with built-in flexible double redundancy
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Application No.: US17472307Application Date: 2021-09-10
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Publication No.: US11640835B2Publication Date: 2023-05-02
- Inventor: Anil Chowdary Kota , Hochul Lee
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Loza & Loza, LLP
- Main IPC: G11C7/02
- IPC: G11C7/02 ; G11C7/06 ; G11C7/10 ; G11C7/12 ; G11C7/14 ; G11C7/18

Abstract:
A memory device with built-in flexible redundancy is provided according to various aspects of the present disclosure. In certain aspects, a memory device includes a first sense amplifier, a second sense amplifier, a first comparator, a second comparator, a reference circuit, and a logic gate. During a redundant read operation, the first sense amplifier, the first comparator, and the reference circuit are used to read one copy of a redundant bit stored in the memory device, and the second sense amplifier, the second comparator, and the reference circuit are used to read another copy of the redundant bit stored in the memory device. The logic gate may then determine a bit value based on the bit values of the read copies of the redundant bit (e.g., determine a bit value of one if the bit value of at least one of the read copies of the redundant bit is one).
Public/Granted literature
- US20210407559A1 MEMORY DEVICE WITH BUILT-IN FLEXIBLE DOUBLE REDUNDANCY Public/Granted day:2021-12-30
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