Invention Grant
- Patent Title: Interconnect structures and methods of fabrication thereof
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Application No.: US17144724Application Date: 2021-01-08
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Publication No.: US11640936B2Publication Date: 2023-05-02
- Inventor: Chao-Hsun Wang , Wang-Jung Hsueh , Fu-Kai Yang , Mei-Yun Wang , Sheng-Hsiung Wang , Shih-Hsien Huang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L23/532 ; H01L29/40 ; H01L21/768 ; H01L21/321 ; H01L23/528

Abstract:
A semiconductor structure and the manufacturing method thereof are disclosed. An exemplary semiconductor structure includes a first source/drain contact and a second source/drain contact spaced apart by a gate structure, an etch stop layer (ESL) over the first source/drain contact and the second source/drain contact, a conductive feature disposed in the etch stop layer and in direct contact with the first source/drain contact and the second source/drain contact, a dielectric layer over the etch stop layer, and a contact via extending through the dielectric layer and electrically connected to the conductive feature. By providing the conductive feature, a number of metal lines in an interconnect structure of the semiconductor structure may be advantageously reduced.
Public/Granted literature
- US20220223517A1 Interconnect Structures and Methods of Fabrication Thereof Public/Granted day:2022-07-14
Information query
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