Invention Grant
- Patent Title: Low-k feature formation processes and structures formed thereby
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Application No.: US17222303Application Date: 2021-04-05
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Publication No.: US11640978B2Publication Date: 2023-05-02
- Inventor: Wan-Yi Kao , Chung-Chi Ko
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/417
- IPC: H01L29/417 ; H01L29/66 ; H01L21/8234 ; H01L21/28 ; H01L29/78 ; H01L27/088

Abstract:
Embodiments of the present disclosure relate to a method of forming a low-k dielectric material, for example, a low-k gate spacer layer in a FinFET device. The low-k dielectric material may be formed using a precursor having a general chemical structure comprising at least one carbon atom bonded between two silicon atoms. A target k-value of the dielectric material may be achieved by controlling carbon concentration in the dielectric material.
Public/Granted literature
- US20210226024A1 Low-k Feature Formation Processes and Structures Formed Thereby Public/Granted day:2021-07-22
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