Invention Grant
- Patent Title: Method for controlling fault using switching technique of three phase four wire interlinking converter
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Application No.: US17352606Application Date: 2021-06-21
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Publication No.: US11641156B2Publication Date: 2023-05-02
- Inventor: Chung Yuen Won , Kwang Su Na , Mi Na Kim , Bong Yeon Choi , Kyoung Min Kang , Hoon Lee , Chang Gyun An , Tae Gyu Kim , Jun Sin Yi
- Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
- Applicant Address: KR Suwon-si
- Assignee: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
- Current Assignee: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
- Current Assignee Address: KR Suwon-si
- Agency: NSIP Law
- Priority: KR10-2020-0097514 20200804
- Main IPC: H02M1/32
- IPC: H02M1/32 ; H02M7/5387

Abstract:
A method for controlling a fault of a three phase four wire interlinking converter system according to one embodiment of the present disclosure comprises obtaining a first d-q-o coordinate plane based on an internal phase angle of output voltage produced from each phase of an inverter; converting the first d-q-o coordinate plane to a second d-q-o coordinate plane based on the o-axis configured differently from the first d-q-o coordinate plane; obtaining an output voltage vector for determining a fault location by performing d-q transform on the second d-q-o coordinate plane; determining occurrence of a fault and an area related to the fault based on the output voltage vector; and in the occurrence of the fault, allocating a zero voltage vector to the area related to the fault.
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